The present invention relates, in general, to ion implantation, and more particularly, to a method for making a shallow junction in gallium arsenide.
As semiconductor device dimensions shrink laterally, designers must scale the vertical dimensions of the devices as well. One important vertical dimension is junction depth. Ion implantation is a popular method for creating shallow junctions in semiconductor and semi-insulating substrates during the manufacture of electronic devices. Ion implantation provides accurate dose control of chosen atomic species, and provides greater uniformity of dose across the substrate.
Following implantation, the substrates are annealed by heat treatment or the like to make the dopant atoms electrically active. In the case of gallium arsenide substrates, an upper surface of the substrate is usually covered with a capping layer of silicon nitride, silicon oxide, aluminum nitride, or the like to protect the surface and prevent outgassing of arsenic during the anneal heat treatment.
Silicon is the most widely used implanted species for n-type dopant into gallium arsenide. Unfortunately, activation efficiency of silicon using conventional capping and heat treatment processes varies from less than ten percent to nearly eighty percent. Activation efficiency means the percentage of implanted dopant that actually becomes electrically active. To make low contact resistance ohmic contacts to semiconductor, it is necessary that the doped regions have high carrier concentrations and low resistivity. The effect of low activation efficiency is high resistivity doped regions. Because metal used for electrical contacts in integrated circuits can only make low resistance ohmic contact to low resistivity regions, the low and variable activation efficiency provided by conventional processing required manufacturers use large surface area contacts, use higher concentrations of dopant atoms, and accept lower device yields.
What is needed is a process for making shallow semiconductor junctions that provides higher carrier concentration and lower resistivity regions in gallium arsenide substrates.